Synthesizable AXI4 crossbar with a full UVM verification environment — RTL, SVA, coverage, stress, and CI.
-
Updated
Aug 21, 2025 - SystemVerilog
Synthesizable AXI4 crossbar with a full UVM verification environment — RTL, SVA, coverage, stress, and CI.
Deterministic hardware verification engine that fails CI when connected components violate electrical or interface contracts.
Socketed PIC32MX programmer PCB for ICSP flashing, USB bootloading, firmware development, and hardware validation.
High-performance discrete-time voltage-mode PID controller for a 100 kHz synchronous buck converter implemented on a Xilinx Spartan-7 FPGA. Features parallel hardware execution, 23-bit fixed-point precision, dual-stage saturation, and cycle-accurate verification. Validated on physical hardware.
Wokwi Arduino Uno NTC thermistor temperature validation bench with ADC conversion, Python analysis, plots, and automated PDF reporting.
Basys 3 FPGA avionics visualization and sensor-evidence stack with VGA HUDs, I2C/SPI/UART telemetry bridges, focused Verilog benches, and Vivado flows.
Automated acceptance toolkit for Linux deep learning GPU servers
Simulation-only validation ladder for mapping neural weight matrices to HRM-style photonic transfer functions.
Utility scripts and diagnostics for Arduino boards — modular, reusable, and hardware-focused.
A framework that ensures that Nitrux runs in a predictable, supportable, and well-understood environment.
Hardware-constrained validation of SRFM metastable structural diagnostics on IBM Quantum systems.
A deterministic, multi-phase C++ PCIe protocol analyzer for decoding TLP traffic, validating transactions, modeling system behavior, and performing fault injection with cross-domain correlation (PCIe, CXL, NVMe).
Production-style Python automation framework for server hardware & SSD validation | pytest | CI/CD | defect classification | GitHub Actions
Python tool for parsing memory validation logs and generating clean CSV and Markdown reports for server hardware testing workflows.
Supervised Hamilton STAR, ODTC, and Tecan run cards for whole-genome sequencing, scRNA-seq, PCR enrichment, methylation sequencing, and TIP-seq; validation status is explicit.
Linux hardware preflight: 18 sensor/memory/peripheral checks via /proc, /sys, syscalls, serial I/O — JSON + Markdown reports
Hardware Control GateKeeper Kernels for AI inference within frameworks.
Evidence and permission for autonomous labs: expert QC gates, workcell orchestration, provenance, recovery, and honest hardware boundaries.
Linux Validation Suite (LVS): Linux hardware validation with CLI/TUI stress testing, telemetry, result review, and QA smoke tests.
Public-safe embedded hardware, PCB, firmware, breadboard, and validation patterns for intelligent infrastructure.
Add a description, image, and links to the hardware-validation topic page so that developers can more easily learn about it.
To associate your repository with the hardware-validation topic, visit your repo's landing page and select "manage topics."